1. Field of the Invention
The present invention relates to an analysis prober and an analysis apparatus for analyzing a semiconductor chip, and more particularly to a prober for semiconductor chip analysis and an analysis apparatus for optically evaluating a semiconductor chip.
2. Description of the Related Art
Methods of performing evaluation and analysis of semiconductor devices include an EMS (Emission Microscope) method in which, while a voltage is applied to a semiconductor device, an optical detector observes light emitted from a faulty point or the like, and an OBIC (Optical Beam Induced Current) method in which a surface of a semiconductor chip is scanned with laser light to detect a change in current produced at a faulty point or the like. FIG. 1 is a sectional view showing a prior art of a wafer analysis apparatus which performs evaluation and analysis of such a kind for a semiconductor device in a wafer state.
Optical device 11 for analysis such as a CCD (Charge Coupled Device) camera or laser is disposed at an upper position, and semiconductor wafer 13 is placed with its front facing upward on wafer stage 12. Wafer stage 12 is moved for positional adjustment such that a chip to be analyzed is located directly below optical device 11 for analysis. Semiconductor wafer 13 is vacuum absorbed by and fixed to wafer stage 12 which has numerous small holes therein for allowing vacuum absorption. Then, while the surface of the wafer is viewed from above using microscope 14 for probe position check, the position of probe 6 (metallic probe) is set through the following operations to perform probing. Specifically, probe 6 is moved vertically by manipulating adjustment handle 24a of manipulator 5 fixed to platen 15, and is moved along the surface of the semiconductor wafer by manipulating adjustment handle 24b. 
After such probing, electrical input is provided to an integrated circuit within the semiconductor chip through probe 6, and optical device 11 for analysis is used from above to detect light produced from a faulty point or the like or to scan the surface of the semiconductor chip with a laser beam. Simultaneously with the observation of the light, optical device 11 for analysis observes the image of the surface of the chip to be analyzed to identify the point where the light is produced or the point where a current change is produced, thereby performing evaluation and analysis of the chip to be analyzed.
As described above, in typical analysis with probing, all the optical detection, scanning and probing are performed on the front of the chip.
It should be noted that microscope 14 for probe position check and optical device 11 for analysis may be installed as one unit having both functions.
In recent years, however, wiring is increasingly multilayered with a larger scale semiconductor integrated circuit, which makes it difficult to identify a faulty point from the front of a chip which is covered with metallic wiring. As a technique to analyze a fault in such an integrated circuit, a technique of detecting a defective point from the back of a chip (back side analysis technique) is conducted with the EMS method or OBIC method by utilizing infrared light with high transmittance for a semiconductor.
The back side analysis technique which can utilize only the light in the infrared range, however, has problems such as lower detection sensitivity than that of the analysis from the front of a chip which can utilize a wider wavelength range, and in some cases, the front side analysis technique may be more effective. From the need for addressing such a condition, a number of commercially available apparatuses are capable of evaluation and analysis from both front and back of a chip.
Such analysis apparatuses require that electrical input is supplied to the front of a semiconductor chip having an integrated circuit formed therein, and the semiconductor chip is held in such a manner that optical observation is allowed from the back of the chip at back side analysis, or from the front of the chip at front side analysis. To this end, such analysis apparatuses generally employ an approach in which an expensive optical device for analysis responsible for the function of detecting a defective point is set to one system, and the semiconductor chip is held with its front and back reversed depending on whether the front side analysis or back side analysis is performed.
For example, a semiconductor chip is mounted in a mold package or the like which is processed with relative ease, and the chip is opened at the back for the back side analysis technique while the chip is opened at the front for the front technique, thereby allowing both analysis techniques to be performed with relative ease. Specifically, even when the whole package is held with its front and back reversed, input/output terminals of the integrated circuit are drawn to lead terminals around the package to enable electrical input through the lead terminals. In this case, however, there is a problem of a longer analysis TAT (Turn Around Time) due to the time taken for the mounting into and opening of the package.
FIG. 2 is a sectional view of a mold package for explaining the back side analysis technique. Semiconductor chip 4 is mounted on island 16 and wire bonding is performed to connect input/output terminals of an integrated circuit to lead 17. Semiconductor chip 4 and bonding wire 18 are held with mold resin 19. Then, mold resin 19 and island 16 on the back of the chip are removed to provide opening 20 for exposing the back of the chip. In an analysis apparatus having a package accommodating mechanism, electrical input/output is made from lead 17 and back side analysis is performed through back opening 20.
On the other hand, when analysis is performed on a chip which is not mounted in a package or in a wafer state, probing is required for electrical input. In this case, if the chip is turned upside down, the probing is performed from the opposite direction, which change is not easy.
FIG. 3 is a sectional view of an analysis apparatus which has optical device 11 disposed at an upper position and is configured to allow probing of a semiconductor wafer from both above and below, but in this case probing is performed from below for back side analysis. Semiconductor wafer 13 is placed such that a chip to be analyzed is disposed directly below opening 22 for analysis formed at the center of removable wafer stage 21, and the wafer is fixed with vacuum absorption using numerous holes formed in a contact surface of removable wafer stage 21. Thereafter, removable wafer stage 21 is set on a wafer stage mounting section (not shown) provided in the analysis apparatus such that the back of the chip faces upward. While the surface of the wafer is viewed from below with CCD camera 23 for probe position check, probing is performed by manipulating adjustment handles 24a, 24b of manipulator 5 provided at platen 15 similarly to the aforementioned prior art. Electrical input is supplied to an integrated circuit within the semiconductor chip through probe 6, and the back side analysis is performed from the aforementioned opening 22 using optical device 11 for analysis.
When front side analysis is performed using the analysis apparatus, manipulator 5 is mounted to platen 15 on the opposite side and removable wafer stage 21 and CCD camera 23 are removed. A wafer stage for front side analysis is disposed in a lower position and a semiconductor wafer is fixed thereon, and then probing and the front side analysis are performed from above with optical device 11 for analysis which is integrated with a microscope.
A first problem in the aforementioned cases is a long analysis TAT when a semiconductor chip is mounted in a package for analysis. In the back side analysis, the analysis TAT is particularly longer. That is because it is necessary that the semiconductor chip is mounted in the package for allowing electrical input to the semiconductor integrated circuit and then the package is opened at a desired position for failure analysis.
In the front side analysis, analysis can be performed with simple mounting by fixing the back of a chip onto an island through a solder material and performing bonding. The back side analysis, however, is difficult to perform with such simple mounting due to the difficulty of bonding with the back of a chip opened. In the back side analysis, it is necessary that the back of a chip is fixed onto an island through a solder material and wire bonding is performed, and then the semiconductor chip, the bonding wires and leads are held with a mold resin or the like, and further, the mold resin, the island and the solder material on the back of the chip are removed, and the back of the semiconductor chip is subjected to mirror polishing.
A second problem is high cost of analysis when analysis is enabled from both front and back of a semiconductor chip with probing performed on the chip. That is because an analysis apparatus for allowing both front side analysis and back side analysis is expensive.
When an optical device for analysis responsible for detecting a defective point is set to one system and a semiconductor chip is held with its front and back reversed depending on whether the front side analysis or back side analysis is performed, the probing is also performed from the opposite direction, thereby requiring an expensive prober provided with a specialized probing mechanism. In contrast, when an optical device for analysis responsible for detecting a defective point is increased to two systems, the front side analysis and back side analysis are allowed and the direction of probing is set in one direction. However, the need still exists for simultaneously exposing the back of a chip for which optical detection is performed and the front of the chip for which probing is performed in order to perform the back side analysis. Also, the addition of the expensive optical device for analysis renders the cost of the analysis apparatus higher than that when a specialized probing mechanism is added thereto.
A third problem is the difficulty in analyzing a semiconductor chip of specific shape due to restrictions on the shape of the semiconductor chip which is fixed to a stage using vacuum absorption when the back of the semiconductor chip faces upward and probing is performed from below. That is because it is impossible to ensure a region in the perimeter of the chip for holding the chip at the vacuum absorption if the chip has a dimension smaller than an opening in the stage for the back side analysis. If the opening in the stage is too large, a small chip cannot be fixed. If the opening in the stage is too small, the entire chip is difficult to observe.
When a number of stages having openings with different sizes are provided, semiconductor chips of various shapes and dimensions can be held. However, the provision of many stages each with a vacuum absorption mechanism increases the cost of analysis, and additionally, the production of a stage for each analysis increases the analysis TAT. A further problem is the inability to detect a defect in a holding region of a chip for the vacuum absorption since the region is covered with the stage and cannot be subjected to the back side analysis. Therefore, it is difficult to analysis the entire semiconductor chip which is cut into pellet shape in the fixing with the vacuum absorption.
A fourth problem is a drawback in workability when the back of a semiconductor chip faces upward and probing is performed from below. That is because the surface of the semiconductor chip must be observed within a limited field of view provided by a CCD camera or the like.
In normal setting of a wafer prober when analysis is performed with the front of a semiconductor chip facing upward, the position of a chip to be analyzed within a wafer is visually checked, and then the chip is moved below a microscope. While the positions of a probe and a pad (electrical terminal portion) on the semiconductor chip are checked with the microscope, a manipulator is operated to perform probing. At this point, when the observed image with the microscope is an erect image, workability is good since the direction of the probe observed in the field of view of the microscope matches the direction of the operated manipulator. However, when the front of the semiconductor chip is observed with the back of the semiconductor chip facing upward, the workability of the probing is deteriorated since an observer must make a visual check looking from below upward.
To avoid this, a monitor image from the CCD camera or the like is often utilized as in the aforementioned prior art. The limited field of view of the CCD camera or the like, however, deteriorates the workability when a particular chip to be analyzed is selected on a wafer on which many chips with the same pattern are aligned. In addition, when an observer operates a manipulator while viewing the monitor image, some skills are required to acquire intuitive matching of the direction of the probe observed on a screen and the direction of the manipulator being operated. For improving the workability, it is possible to perform probing operations on a monitor of a computer using an remotely operable electric manipulator and an electric stage, but a problem exists that analysis equipment becomes expensive accordingly and the analysis cost is increased.
Therefore, the task of the present invention is to solve the aforementioned problems in the prior art, and it is an object thereof to perform probing on a semiconductor chip as well as to allow analysis from both front of the chip and back of the chip, using an analysis apparatus having a wafer stage for a wafer prober which fixes a wafer with its front facing upward, thereby enabling failure analysis at low cost and a short TAT.
To achieve the aforementioned object, according to the present invention, a prober for analyzing a semiconductor chip is provided, the prober comprising a chip stage on which a semiconductor chip is mounted and a plurality of probes in contact with the semiconductor chip from the front of the semiconductor chip, wherein at least part of the chip stage in contact with the semiconductor chip includes an infrared ray transmitting plate, and the semiconductor chip is pushed onto the chip stage with pressure at probing from the probe and fixed onto the chip stage.
Preferably, the probe is movable vertically and horizontally with a manipulator supported on the chip stage. In addition, an anti-slip piece is preferably formed on the stage for supporting at least one side of the semiconductor chip. Preferably, a removable covering plate can be provided to cover over the chip stage while probing is performed on the semiconductor chip.
To achieve the aforementioned object, according to the present invention, an apparatus for analyzing a semiconductor chip is provided, in which the prober for analyzing a semiconductor chip can be mounted on a prober stage, while probing is performed on a semiconductor chip, with the chip stage or the surface opposite to the surface of the covering plate facing the semiconductor chip being contact with the prober stage, and the semiconductor chip can be analyzed using an optical device provided above the prober stage.
Preferably, the prober stage holds the prober for analyzing a semiconductor chip with vacuum absorption of the chip stage or the covering plate. An optical device is provided above the prober stage, and at least one of the prober stage and the optical device is movable in the horizontal direction.
Since the prober for analysis of the present invention performs probing on a semiconductor chip cut from a semiconductor wafer, it can be reduced in size. In addition, the provision of an anti-slip piece allows the semiconductor chip to be fixed with the pressure from probing. Thus, a mechanism for vacuum absorption is not required and chips of more various shapes can be fixed, and the small and simple structure can reduce the manufacturing cost. Since the reduced size enables a reduction in weight, handling of the prober is facilitated, such as carrying while probing is performed, turning it upside down or the like. In other words, in performing failure analysis, only probing can produce effects similar to those obtained by mounting in a package, thereby making it possible to reduce the time taken for mounting in a package to allow a shorter analysis TAT.
It should be noted also that in the prober for analysis of the present invention, since the bottom surface of the semiconductor chip is pushed against and fixed to a plate which can pass infrared light, the back side analysis can be performed through the infrared ray transmitting plate. Thus, the opening of the chip at the back is eliminated to further reduce the analysis TAT as compared with the back side analysis performed when a chip is mounted in a package.
On the other hand, since no holding region for vacuum absorption is required in the perimeter of a chip in contrast to the probing performed on a semiconductor chip fixed using the vacuum absorption, it is possible to perform analysis of the entire back of semiconductor chips of more various shapes.
In addition, the prober for analysis of the present invention has a mechanism for mounting a removable plate. Thus, even when the prober is turned upside down, it can be fixed with vacuum absorption onto a wafer stage for a wafer prober used in the front side analysis technique in which a wafer is fixed with the front facing upward. Therefore, since both front side analysis and back side analysis are allowed in an analysis apparatus having a wafer stage for a wafer prober used in a typical front side analysis technique, no expensive analysis apparatus is required, thereby allowing an increase in cost of analysis to be suppressed.